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Engineering (R0) Série de Livres électroniques

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  • Symbolic Parallelization of Nested Loop Programs

    par Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich ...
    Collections series Engineering (R0)
    This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime ... En savoir plus

    $115.29 CAD

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  • SVA: The Power of Assertions in SystemVerilog

    par Surrendra Dudani, Eduard Cerny, John Havlicek, Dmitry Korchemny ...
    Collections series Engineering (R0)
    This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection and formal analysis. The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of ... En savoir plus

    $140.89 CAD

  • Digital Logic Design Using Verilog

    Coding and RTL Synthesis

    par Vaibbhav Taraate ...
    Collections series Engineering (R0)
    This second edition focuses on the thought process of digital design and implementation in the context of VLSI and system design. It covers the Verilog 2001 and Verilog 2005 RTL design styles, constructs and the optimization at the RTL and synthesis level. The book also covers the logic synthesis, low power, multiple clock domain design concepts and design performance improvement techniques. The ... En savoir plus

    $108.89 CAD

  • Correct-by-Construction Approaches for SoC Design

    par Roopak Sinha, Parthasarathi Roop, Samik Basu ...
    Collections series Engineering (R0)
    This book describes an approach for designing Systems-on-Chip such that the system meets precise mathematical requirements. The methodologies presented enable embedded systems designers to reuse intellectual property (IP) blocks from existing designs in an efficient, reliable manner, automatically generating correct SoCs from multiple, possibly mismatching, components. ... En savoir plus

    $115.29 CAD

  • Foundations of Hardware IP Protection

    Modifié par Lilian Bossuet, Lionel Torres ...
    Collections series Engineering (R0)
    This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection ... En savoir plus

    $115.29 CAD

  • High Performance Integer Arithmetic Circuit Design on FPGA

    Architecture, Implementation and Design Automation

    par Ayan Palchaudhuri, Rajat Subhra Chakraborty ...
    Collections series Engineering (R0)
    This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating ... En savoir plus

    $115.29 CAD

  • SystemVerilog Assertions and Functional Coverage

    Guide to Language, Methodology and Applications

    par Ashok B. Mehta ...
    Collections series Engineering (R0)
    This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SystemVerilog Functional Coverage. Readers will benefit from the step-by-step approach to functional hardware verification using SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source ... En savoir plus

    $179.39 CAD

  • Testing of Interposer-Based 2.5D Integrated Circuits

    par Ran Wang, Krishnendu Chakrabarty ...
    Collections series Engineering (R0)
    This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a ... En savoir plus

    $115.29 CAD

  • Functional Verification of Dynamically Reconfigurable FPGA-based Systems

    par Lingkan Gong, Oliver Diessel ...
    Collections series Engineering (R0)
    This book analyzes the challenges in verifying Dynamically Reconfigurable Systems (DRS) with respect to the user design and the physical implementation of such systems. The authors describe the use of a simulation-only layer to emulate the behavior of target FPGAs and accurately model the characteristic features of reconfiguration. Readers are enabled with this simulation-only layer to maintain ... En savoir plus

    $115.29 CAD

  • Dependable Multicore Architectures at Nanoscale

    Modifié par Marco Ottavi, Dimitris Gizopoulos, Salvatore Pontarelli ...
    Collections series Engineering (R0)
    This book provides comprehensive coverage of the dependability challenges in today's advanced computing systems. It is an in-depth discussion of all the technological and design-level techniques that may be used to overcome these issues and analyzes various dependability-assessment methods. The impact of individual application scenarios on the definition of challenges and solutions is considered ... En savoir plus

    $115.29 CAD

  • UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

    par Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora, Roman Bartosiński ...
    Collections series Engineering (R0)
    This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow ... En savoir plus

    $115.29 CAD

  • Exploring Memory Hierarchy Design with Emerging Memory Technologies

    par Guangyu Sun ...
    Collections series Engineering (R0)
    This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc. The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the “memory wall.” The ... En savoir plus

    $115.29 CAD